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Analog-to-digital converter (ADC)
RM0008
11.12.5
ADC sample time register 2 (ADC_SMPR2)
Address offset: 0x10
Reset value: 0x0000 0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
SMP9[2:0]
SMP8[2:0]
SMP7[2:0]
SMP6[2:0]
SMP5[2:1]
Res.
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rw
rw
rw
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SMP
5_0
SMP4[2:0]
SMP3[2:0]
SMP2[2:0]
SMP1[2:0]
SMP0[2:0]
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Bits 31:30
Reserved, must be kept cleared.
Bits 29:0 SMPx[2:0]: Channel x Sample time selection
These bits are written by software to select the sample time individually for each channel.
During sample cycles channel selection bits must remain unchanged.
000: 1.5 cycles
001: 7.5 cycles
010: 13.5 cycles
011: 28.5 cycles
100: 41.5 cycles
101: 55.5 cycles
110: 71.5 cycles
111: 239.5 cycles
Note: ADC3 analog input Channel9 is connected to V SS .
11.12.6
ADC injected channel data offset register x (ADC_JOFRx)(x=1..4)
Address offset: 0x14-0x20
Reset value: 0x0000 0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
JOFFSETx[11:0]
Res.
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Bits 31:12
Reserved, must be kept cleared.
Bits 11:0 JOFFSETx[11:0] : Data offset for injected channel x
These bits are written by software to define the offset to be subtracted from the raw
converted data when converting injected channels. The conversion result can be read from
in the ADC_JDRx registers.
226/995
Doc ID 13902 Rev 9
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